(1) Field of the Invention
The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device to be applied to a digital camera.
(2) Description of the Related Art
Conventionally, a dynamic range of solid-state imaging devices has been approximately between 60 dB and 80 dB. The dynamic range is desired to be from 100 dB to 120 dB that is equivalent to visibility of the naked eye or a dynamic range of a silver salt film, or is desired to be improved to a much higher range for use in high-performance cameras, such as a vehicle-mounted camera and a monitoring camera.
Japanese Unexamined Patent Application Publication No. 2004-363666 (hereinafter referred to as Patent Reference 1) discloses a technique of capturing frames each having a different exposure time in length, and combining the captured frames. Since a luminance range to be captured for one frame varies depending on a length of an exposure time, the dynamic range may be expanded by combining frames each having a different luminance range due to a different exposure time.
FIG. 1 illustrates a schematic view of a solid-state imaging device of Patent Reference 1. The solid-state imaging device includes pixel units 171, photodiodes 172, noise cancellers 173, and an amplifier 174. The photodiode 172 is a light-receiving element.
A timing controller in the drawing controls the constituent elements included in the solid-state imaging device, and causes the constituent elements to select a pixel row and a pixel column to be operated. When a voltage level of a terminal Ri is set to be high according to an instruction of the timing controller, a cathode of the photodiode 172 is set to a higher voltage value (initial value). Here, i is a natural number ranging from 1 to N. Next, when a voltage level of the terminal Ri is set to be low, the solid-state imaging device is shifted to a charge integration mode that lowers a cathode potential according to light entering the photodiode 172.
In a row of a terminal Si having a high voltage level, the cathode potential of the photodiode 172 is outputted to an output terminal through the noise canceller 173 and the amplifier 174.
When a voltage level of a terminal Ri becomes high again, a cathode of the photodiode 172 is set to a higher voltage value (initial value), and is shifted to a new charge integration mode.
FIG. 2 illustrates exposure times and output timings in the solid-state imaging device described in Patent Reference 1. The exposure time is divided into 3 categories, long (LAi), short (SAi), and very short (VSAi), and LRi, SRi, and VSRi represent timing when a signal obtained in a charge integration mode is outputted after the respective exposure times, where i is a natural number ranging from 1 to N. Since light is converted to a voltage according to an intensity of light, in other words, normal light during the LAi, strong light during the SAi, and very strong light during the VSAi, a wide dynamic range becomes possible with the solid-state imaging device.
However, since the technique of Patent Reference 1 needs to store signals separately, depending on respective exposure times, LAi, SAi, and VSAi, it takes long processing time. Furthermore, the solid-state imaging device is necessary to provide a storing unit that stores the signals, and a signal combining unit that combines signals, outside the solid-state imaging device to execute post-processing.